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Microcontroller and SoC Diagnostics

This final chapter turns from reliability at the level of populations and lifetimes to the live diagnosis of the single most important part on a modern board — the microcontroller or system-on-chip that runs everything else — and this opening section establishes the discipline that governs all of it: a processor rarely fails on its own, so a dead or misbehaving one is diagnosed by proving the things it needs to run before the chip itself is ever blamed. The temptation, when a device is dead and the big chip at its center does nothing, is to condemn that chip, and it is almost always the wrong move — the system-on-chip is among the most robust parts on the board, and it is also among the most expensive and the hardest to replace, a fine-pitch ball-grid array whose removal is a major operation. Far more often the processor is not broken but stopped, held lifeless by the absence of one of the prerequisites it depends on, and the whole method of this section is to check those prerequisites in order rather than to reach for the chip. A processor needs several things, and needs them in sequence, before it can execute a single instruction. It needs power — every one of its supply rails present and brought up in the correct order, the sequencing the power chapter established, because a missing or mis-ordered rail leaves the chip dead or hung. It needs a clock — a running clock source, whether an external crystal, an on-board oscillator, or a supplied reference, because without a clock the processor is frozen, unable to advance through a single cycle. It needs its reset line to behave — asserted at power-up to hold the chip still while power and clock stabilize, then released so it can start, because a reset held permanently low keeps the processor forever in reset, and one released too early starts it on unsettled power. And it needs a valid boot configuration and firmware to run once it is released. The section teaches the technician to read a processor's vital signs — its current draw, the activity on its clock pins, the state of its reset line, the traffic on its buses — to tell a chip that is not running at all from one that is running but misbehaving, two conditions that call for entirely different diagnostics. And it teaches the professional restraint that follows from all of this: never remove an expensive, difficult SoC until its power, its clock, its reset, and its boot inputs have been proven, because the fault, far more often than not, lies in what surrounds the chip rather than in the chip itself.

AdvancedLow Risk23 min read

What You Will Learn

  • You will learn that a microcontroller or SoC rarely fails on its own and is usually stopped by a missing prerequisite.
  • You will learn the boot sequence a processor needs — power, clock, reset release, and valid boot configuration — in order.
  • You will learn why the clock source and the reset line are the two silent killers of a dead processor.
  • You will learn to read a processor's vital signs to tell a chip that is not running from one that misbehaves.
  • You will learn the restraint never to condemn an expensive SoC until its inputs are proven.

What You Will Be Able To Do

  • You will be able to explain why a dead SoC is usually a symptom of a missing prerequisite, not a failed chip.
  • You will be able to check a processor's boot sequence prerequisites in order.
  • You will be able to test a clock source and a reset line as causes of a non-booting processor.
  • You will be able to read current draw, clock, reset, and bus activity as a processor's vital signs.
  • You will be able to decide whether a processor is not running or running but misbehaving.

Required Tools

  • A multimeter and oscilloscope — to read a processor's rails, its clock activity, and the state of its reset line
  • A bench supply with current display — because a running processor draws a characteristic current that a stopped one does not
  • The board's power and boot documentation — the rails, their sequence, the clock, and the reset and boot-mode pins to check against
  • A known-good board where possible — so a processor's vital signs can be compared against what a healthy one shows

When NOT to Attempt This

Do not attempt this section if any of the following apply to you:

  • You are not comfortable working with small surface-mount components.
  • You have not completed the prerequisite sections for this skill.
  • You do not have the required tools in working condition.

Section Overview

This final chapter turns from reliability over populations to the live diagnosis of the processor at a board's center, and the governing rule is that a microcontroller or SoC rarely fails on its own (mtbf-and-component-reliability). The system-on-chip is among the most robust parts on the board and among the most expensive and hardest to replace, so a dead one is far more often stopped — held lifeless by a missing prerequisite — than actually broken, and the method is to prove its inputs before condemning it. A processor needs things in order to run, and the boot sequence is that ordered chain: every power rail present and correctly sequenced, then a running clock, then reset released, then valid boot configuration and firmware (power-sequencing-failures). It needs a clock source — a crystal, oscillator, or supplied reference — because without a clock it is frozen, unable to advance a cycle (diagnosing-with-the-oscilloscope). And it needs its reset line to behave: asserted at power-up to hold it still while power and clock stabilize, then released, because a reset held low keeps it forever in reset and one released too early starts it on unsettled power (pmic-failure-analysis). The section teaches reading a processor's vital signs — current draw, clock activity, reset state, bus traffic — to tell a chip that is not running from one running but misbehaving, and the restraint never to remove a difficult SoC until its inputs are proven (diagnosing-with-the-oscilloscope).

Why This Matters

This is the section that stops a technician from throwing an expensive, hard-to-replace chip at a fault that was never in the chip. This matters because the SoC is the wrong first suspect: it is one of the most robust parts on the board and one of the most punishing to replace, so condemning it early risks a difficult, costly rework that does not fix the fault, when the real cause is usually in what the chip needs to run (mtbf-and-component-reliability). This matters because a dead processor is a symptom with a short list of causes: power, clock, reset, and boot configuration are the prerequisites, and checking the boot sequence in order turns a baffling dead board into a methodical search of four things rather than a guess (power-sequencing-failures). It matters because two of those causes are silent and easily missed: a clock source that has stopped and a reset line held in the wrong state both leave a fully powered chip completely lifeless, with every rail correct, so a technician who does not check them can stare at good power and conclude wrongly that the chip is dead (diagnosing-with-the-oscilloscope). And it matters because a running chip and a stopped chip need different diagnostics: reading the vital signs to tell whether the processor is executing at all decides whether the next step is to restore a missing prerequisite or to chase a firmware or peripheral fault, and confusing the two wastes the whole effort (pmic-failure-analysis). Suspect the inputs before the chip, check the boot sequence in order, and read the vital signs — and a dead SoC becomes a solvable diagnosis rather than an expensive gamble.

Required Prerequisites

Before starting this section, you should have completed:

  • Power Sequencing Failures — the rails a processor needs and the order they must arrive in, the first and most common prerequisite behind a dead SoC.
  • Diagnosing with the Oscilloscope — the instrument that reveals a processor's clock activity and reset behavior, the tool for the vital signs this section reads.
  • The board's power and boot documentation — the rail list, the power sequence, the clock arrangement, and the reset and boot-mode pins, so the prerequisites are checked against a reference rather than guessed.
  • A current-sensing bench supply or meter — because a running processor draws a characteristic current and a stopped one does not, making current draw a first vital sign.
  • Fine oscilloscope probes and tips — to reach a crystal's pins and a reset line without slipping, since these nodes are small and easily shorted.
  • A dead board with a large SoC or MCU — one that does nothing, so the prerequisite-by-prerequisite method is practiced where the chip is the tempting but wrong first suspect.
  • A known-good identical board — so a processor's rails, clock, reset, and current draw can be compared against a healthy reference.
  • A board with a stopped clock or held reset — so the two silent killers can be seen to leave a fully powered chip completely lifeless.

Real-World Applications

Reading a processor by its prerequisites is the method behind every dead-board diagnosis at the compute core. A technician facing a device that will not power up past its processor checks the rails, clock, and reset in order before ever suspecting the SoC (power-sequencing-failures). A bench meeting a fully powered but lifeless board looks to the clock source and the reset state, the silent killers that stop a chip with good power (diagnosing-with-the-oscilloscope). A repairer weighing a difficult BGA reball first proves the chip is truly dead, not merely starved of a prerequisite, because the rework is far too costly to attempt on a guess (mtbf-and-component-reliability). And a technician distinguishing a crash from a no-boot reads the vital signs to tell a chip that never started from one that started and misbehaved (pmic-failure-analysis). The confusions this prevents: a robust SoC condemned for a power fault, a stopped clock mistaken for a dead chip, an expensive reball attempted on a starved processor, and a firmware fault chased on a chip that never ran.

Common Challenges

  • The big chip is the tempting first suspect. A dead board points attention at its central processor — when the SoC is robust and the fault is usually in what feeds it (mtbf-and-component-reliability).
  • Good power hides a stopped clock. Every rail measures correct yet the chip is lifeless — because a halted clock source freezes a fully powered processor (diagnosing-with-the-oscilloscope).
  • A held reset looks exactly like a dead chip. The processor does nothing and draws almost no current — because its reset line is stuck asserted, holding it still, not because it has failed (power-sequencing-failures).
  • A crash and a no-boot are confused. "It doesn't work" covers two different faults — a chip that never ran and a chip that ran and misbehaved need different diagnostics (pmic-failure-analysis).

Safety Notes

Risk Level: Low. This section is measurement and reasoning on powered boards — reading rails, clocks, and reset lines — and the standing bench law and the diagnostics volumes' cautions govern all live-circuit probing.

  • A slipped probe can short a rail and kill the chip — the crystal pins, reset line, and fine-pitch rails are small and close; probe with fine tips and a secured board.
  • Respect upstream power and stored charge — know the rails before probing, and discharge high-voltage inputs and bulk capacitors per the diagnostics volumes before touching upstream of the regulators.
  • Hot parts stay hot — a working processor and its power devices can burn; treat them as hot until confirmed cool.

Professional Tips Before Starting

  • Suspect the inputs before the chip. A dead SoC is far more often starved than broken — so prove its power, clock, and reset before considering the chip itself (mtbf-and-component-reliability).
  • Check the boot prerequisites in order. Power, then clock, then reset, then boot configuration — a methodical sequence beats guessing at a dead board (power-sequencing-failures).
  • Do not trust good rails to mean a live chip. A stopped clock or a held reset leaves correct power and a lifeless processor — so read the clock and reset, not only the rails (diagnosing-with-the-oscilloscope).
  • Read current draw as a first vital sign. A running processor draws characteristically more than one held in reset — so the supply current tells you something before a probe touches a pin.
  • Prove death before an expensive reball. Confirm the chip is truly dead, not starved — because removing a fine-pitch SoC is far too costly to attempt on a guess (pmic-failure-analysis).

Diagnosing the Processor by Its Prerequisites

Why the SoC Is Rarely the Fault

The single most useful belief a technician can hold when a device is dead at its processor is that the processor is probably fine (mtbf-and-component-reliability). A modern microcontroller or system-on-chip is a remarkably robust part — it has no moving parts, it runs within tightly regulated limits, and it is protected by the very power and reset circuitry that surrounds it — and it is, at the same time, one of the most expensive components on the board and by far the most difficult to replace, a fine-pitch ball-grid array whose removal and reballing is a major, risky operation. These two facts together make condemning the SoC the worst possible first move: it is the least likely part to have failed and the most punishing one to replace, so a technician who reaches for it first risks an expensive, board-damaging rework to fix a fault that was never in the chip. What has almost always happened instead is that the processor has been stopped, not broken — held completely lifeless by the absence of one of the several prerequisites it must have to run at all. This is the reframing the whole section rests on: a dead SoC is not a diagnosis but a symptom, and the diagnosis is to find which of the things the chip depends on is missing. Those dependencies form a short, ordered list — the boot sequence — and a processor needs every item on it, in order, before it can execute a single instruction: all of its power rails, present and correctly sequenced; a running clock; a reset that is asserted and then released at the right moment; and a valid boot configuration to run once it starts (power-sequencing-failures). Check that chain, in that order, and the mysterious dead board becomes a methodical search of four things rather than a gamble on the most expensive part present.

The Clock and the Reset Line — the Two Silent Killers

Of the prerequisites in the boot sequence, power is the one most technicians check first and best, because a missing rail is easy to measure; but two others stop a processor just as completely and are missed far more often, precisely because the power looks perfect while they fail (diagnosing-with-the-oscilloscope). The first is the clock source. A processor is a synchronous machine: it advances through its work one clock cycle at a time, and without a clock it does not advance at all — it simply freezes, fully powered and utterly still, every rail correct and not one instruction executed. The clock may come from an external crystal and the chip's internal oscillator circuit, from a standalone oscillator module, or from a reference supplied by another chip, and any of these can fail — a cracked crystal, a broken load capacitor, a dead oscillator, a missing reference — leaving the processor with immaculate power and no heartbeat (diagnosing-with-the-oscilloscope). This is why a clock check belongs early in any dead-processor diagnosis: on an oscilloscope, the crystal pins should show oscillation, and their silence explains a lifeless chip that every voltmeter says should be running. One caution attends this check: a standard oscilloscope probe's own capacitance can stall a marginal oscillator, so the driven output pin or a downstream buffered clock is probed in preference to the sensitive crystal input, and a low-capacitance or active probe is used where possible — and some processors boot first on an internal oscillator and switch to the external crystal only later, so a quiet crystal is not always fatal and a fault can surface only at that switchover. The second silent killer is the reset line. Reset exists to hold the processor still at power-up until its power and clock have stabilized, and then to release it so it can begin — a deliberate, timed hand-off (pmic-failure-analysis). When that hand-off fails, the chip never runs: a reset held permanently asserted, low on most parts, keeps the processor frozen in reset indefinitely, drawing almost no current and looking for all the world like a dead chip, when in truth it is simply never being let go. The opposite fault — reset released too early, before power and clock are stable — starts the processor on bad conditions and produces an unreliable, hanging, or crashing board rather than a dead one. Both the clock and the reset share the same trap: they leave the power supply looking flawless, so a technician who checks only the rails sees nothing wrong and wrongly concludes the silicon has failed — and both are read directly, the clock as activity on the crystal pins and the reset as the state of the reset line, by the oscilloscope the prerequisites of this section assume.

Reading the Vital Signs — Running, Not Running, or Misbehaving

Diagnosis of a processor comes down to answering one question first — is the chip actually executing? — and that question is answered not by assumption but by reading the chip's vital signs (diagnosing-with-the-oscilloscope). The vital signs are a small set of observable things that together tell a running processor from a stopped one. The first is current draw: a processor that is executing draws a characteristic supply current, meaningfully more than one held in reset or frozen without a clock, so the current a board pulls is a first, probe-free indication of whether anything inside is alive (pmic-failure-analysis). The second is clock activity — oscillation present on the crystal or clock pins — without which nothing else can be happening. The third is the reset line state — released, not held — because a chip in reset is a chip not running. And the fourth is bus traffic: activity on the address, data, or serial buses, the memory and boot interfaces, is the sign of a processor that has started and is fetching and executing. Reading these together sorts a dead-at-the-processor board into two fundamentally different conditions. A chip that is not running at all — no characteristic current, no clock, or a held reset — has a missing prerequisite, and the diagnosis continues down the boot sequence to find which one (power-sequencing-failures). A chip that is running but misbehaving — drawing current, clock alive, reset released, buses active, yet the device does not work — has a different class of fault entirely, in its firmware, a peripheral, or a specific rail, and no amount of checking the boot prerequisites will find it. Telling these two apart is the whole payoff of reading the vital signs: it decides whether the next move is to restore something the chip needs or to chase a fault in what the chip is doing, and it keeps a technician from the two classic wastes — hunting a boot prerequisite on a chip that is plainly running, and reflashing firmware on a chip that never started. And underneath all of it sits the section's discipline: the expensive, difficult SoC is never removed until its power, its clock, its reset, and its boot inputs have all been proven, because a processor is far more often stopped than broken, and the fault is usually in what surrounds the chip rather than in the chip itself.

Common Mistakes

  • Condemning the SoC first. The central chip is blamed for a dead board — when it is the most robust and least likely part to have failed, and the costliest to replace wrongly (mtbf-and-component-reliability).
  • Checking only the power rails. The rails measure correct, so the chip is declared dead — when a stopped clock source or a held reset leaves perfect power and a lifeless processor (diagnosing-with-the-oscilloscope).
  • Missing a held reset. A chip drawing almost no current is read as failed — when its reset line is stuck asserted and the chip is merely never released (power-sequencing-failures).
  • Reflashing a chip that never ran. Firmware is rewritten to fix a no-boot — when the processor has no clock or power and never executed a line, so the firmware was never the fault (pmic-failure-analysis).
  • Attempting a reball on a guess. A difficult SoC is removed before its inputs are proven — when a rail, crystal, or reset component was the real and far cheaper fault.

Troubleshooting Guidance

  • A device is dead and the processor does nothing — check the boot prerequisites in order: prove every rail present and sequenced, the clock running, and the reset released before suspecting the chip, because a dead SoC is usually a missing prerequisite, not a failure (power-sequencing-failures).
  • Every rail is correct but the chip is lifeless — read the clock and the reset: a stopped clock source or a held reset line leaves power perfect and the processor frozen, so scope the crystal pins and the reset state rather than trusting the rails alone (diagnosing-with-the-oscilloscope).
  • The board draws almost no current — suspect a held reset or no clock: a processor frozen in reset or without a clock draws far less than a running one, so very low current points at a missing prerequisite, not necessarily a dead chip (pmic-failure-analysis).
  • The chip is clearly running but the device misbehaves — stop checking the boot sequence: current, clock, reset, and buses all active mean the processor started, so the fault is in firmware, a peripheral, or a specific rail, not in the prerequisites (mtbf-and-component-reliability).

Verification & Testing Methods

Confirm your grasp of processor diagnostics before continuing:

  • [ ] I can explain why a dead SoC is usually a missing prerequisite rather than a failed chip, and why the chip is the wrong first suspect.
  • [ ] I can check a processor's boot sequence prerequisites — power, clock, reset, boot configuration — in order.
  • [ ] I can test a clock source as a cause of a fully powered but lifeless processor.
  • [ ] I can test a reset line for a held-asserted or too-early-released fault.
  • [ ] I can read current draw, clock, reset, and bus activity to tell a chip that is not running from one that misbehaves.

Then try the practice exercises below — measurement and reasoning; scenarios differ from the quiz.

Practice Exercises

  1. Check the prerequisites in order (5 minutes, a dead board). For a board dead at its processor, list its prerequisites — each power rail and its order, the clock, the reset, the boot configuration — and check them one by one against the documentation, rather than suspecting the chip (power-sequencing-failures).
  2. Test the clock (5 minutes, a powered board). With an oscilloscope, look for oscillation on the crystal or clock pins of a fully powered but lifeless processor, and explain why its silence would freeze a chip whose every rail is correct (diagnosing-with-the-oscilloscope).
  3. Test the reset (5 minutes, a powered board). Read the state of a processor's reset line and determine whether it is held asserted or properly released, and explain how a stuck reset produces a chip that looks dead but has not failed (pmic-failure-analysis).
  4. Read the vital signs (5 minutes, two boards). For a running board and a stopped one, compare current draw, clock activity, reset state, and bus traffic, and state for each whether the processor is not running or running but misbehaving, and what that implies for the next step (power-rail-sequencing).

These core skills — checking the boot sequence, testing the clock and the reset, and reading the vital signs — are tested in the Chapter Quiz at the end of this chapter, where a score of 80% is required to continue.

Key Takeaways

  • A microcontroller or SoC rarely fails on its own — it is among the most robust and the most expensive, hardest-to-replace parts on the board — so a dead one is far more often stopped by a missing prerequisite than broken, and the diagnosis is to prove its inputs, not condemn the chip (mtbf-and-component-reliability).
  • A processor needs its boot sequence in order to run: every power rail present and correctly sequenced, then a running clock, then the reset released, then valid boot configuration and firmware — and a missing or mis-ordered link leaves the chip dead or hung (power-sequencing-failures).
  • A clock source and a reset line are the two silent killers: a stopped clock freezes a fully powered chip, and a reset held asserted keeps it forever still — both leaving the power supply looking perfect, so a technician who checks only the rails concludes wrongly that the silicon has failed (diagnosing-with-the-oscilloscope).
  • A processor's vital signs — current draw, clock activity, reset state, and bus traffic — are read to tell a chip that is not running from one running but misbehaving, two conditions that call for entirely different diagnostics (pmic-failure-analysis).
  • The expensive, difficult SoC is never removed until its power, clock, reset, and boot inputs have all been proven, because the fault, far more often than not, lies in what surrounds the chip rather than in the chip itself.

Skills Learned

After completing this section, you can:

  • Explain why a dead SoC is usually a symptom of a missing prerequisite, not a failed chip.
  • Check a processor's boot sequence prerequisites in order.
  • Test a clock source and a reset line as causes of a non-booting processor.
  • Read current draw, clock, reset, and bus activity as a processor's vital signs.
  • Decide whether a processor is not running or running but misbehaving.

Glossary Additions

New terms introduced in this section:

  • boot sequence — the ordered chain of prerequisites a microcontroller or system-on-chip must have satisfied before it can execute a single instruction, and the checklist a technician follows to diagnose a dead processor. In order, it requires every power rail present and brought up in the correct sequence; a running clock; the reset line asserted at power-up to hold the chip still while power and clock stabilize and then released to let it start; and a valid boot configuration and firmware for it to run once released. Because each link depends on the ones before it, a missing or mis-ordered rail, a stopped clock, a stuck reset, or an invalid boot configuration each leaves the processor dead or hung — so checking the boot sequence in order turns a baffling dead board into a methodical search of a short list of causes rather than a guess at the most expensive chip on the board.
  • clock source — the origin of the clock signal that a synchronous processor needs to advance through its work, one cycle at a time; without it the processor is frozen, fully powered and unable to execute a single instruction. The clock may come from an external crystal driven by the chip's internal oscillator circuit, from a standalone oscillator module, or from a reference supplied by another chip, and any of these can fail — a cracked crystal, a broken load capacitor, a dead oscillator, or a missing reference — leaving a processor with immaculate power and no heartbeat. Because a stopped clock source leaves every voltage rail measuring correct while the chip does nothing, it is one of the two silent killers of a dead processor, checked early in diagnosis by looking on an oscilloscope for oscillation on the crystal or clock pins.
  • reset line — the signal that controls when a processor is held still and when it is allowed to run: asserted at power-up to keep the chip in a known idle state while its power and clock stabilize, then released so it can begin executing. Its correct behavior is a timed hand-off, and both of its failure modes stop or destabilize the processor while leaving the power rails looking perfect. Held permanently asserted — low on most parts — it keeps the processor frozen in reset indefinitely, drawing almost no current and appearing for all the world like a dead chip when it is simply never being released; released too early, before power and clock are stable, it starts the processor on bad conditions and produces an unreliable, hanging, or crashing board. Because a mis-behaving reset line mimics a dead chip while the power looks flawless, it is the second of the two silent killers, read directly as the state of the reset pin.

Suggested Next Sections

Must read next:

  • Firmware vs Hardware Fault Isolation — Section 7.2 draws the most important line in embedded diagnostics, between a fault in the code and a fault in the board, and the methods that decide which side a failure lives on before effort is spent reflashing or reworking.

Recommended:

  • PMIC Failure Analysis — the diagnosis of the power rails a processor depends on, the most common missing prerequisite behind a dead SoC.
  • Power Rail Sequencing — the foundation of why a processor's rails must arrive in order, the sequencing whose failure leaves a chip dead or hung.