Section Overview
This section closes the digital chapter the way Section 5.5 closed the analog one: by turning everything in it into a diagnostic framework. You've learned what digital circuits are made of — gates, flip-flops, clocks, buses — and now you'll learn how they fail and how to find the fault. Digital failures fall into a recognizable set: a stuck-at fault (a bit frozen HIGH or LOW), no or bad clock, a floating input, bus problems including bus contention, corrupted data, and power or reset faults up to total-dead. Just as important is the method, which exploits digital's greatest gift to a technician: because every line is simply HIGH or LOW, you can always ask "is this line what it should be?" The method is check power, check clock, check reset — then signal-trace the logic against what each line ought to be, comparing to a known-good reference. Together these turn a dead or misbehaving digital board into a named fault localized to one line or chip.
Why This Matters
Digital diagnosis is where the whole chapter earns its keep. A board arrives dead, frozen, glitching, or garbling data, and the job is to turn that symptom into a specific cause. Knowing the handful of ways digital circuits fail lets you name what you're seeing, and the check-power-clock-reset method plus signal tracing lets you localize it instead of guessing. This matters across nearly all modern equipment, because digital logic is everywhere, and the same failure modes and the same method apply from a microcontroller board to a complex system. And it ties the chapter together: a stuck bus is the I2C fault from Section 6.4, a dead system is the missing clock from Section 6.3, an erratic gate is a floating input from Section 6.1. This is the payoff section — the framework that makes digital repair systematic rather than intimidating, and the mirror image of the analog framework from Section 5.5.
Required Prerequisites
- Buses and Communication Protocols — I2C, SPI, UART — bus faults, pull-ups, and contention are a major digital failure mode covered here.
- Clock Systems and Timing — no clock means a dead system, and the clock is a first thing to check in this method.
- Flip-Flops and Sequential Logic — stuck bits, floating inputs, and metastable corruption all live in the sequential logic from that section.
Recommended Consumables
No consumables required. The exercises are reasoning about symptoms and diagnostic method; nothing is consumed.
Recommended Practice Hardware
- Optional: a microcontroller or logic board to observe, a logic probe, an oscilloscope, and — ideally — a logic analyzer with protocol decode
- A known-good identical board or a second identical channel makes an invaluable reference for comparison
- No special hardware is required; the section is a diagnostic method that stands on reasoning
Real-World Applications
These failure modes and this method are the daily bread of digital repair. A board that is completely dead is usually a power, clock, or reset problem, not a failed processor. A system that boots but misbehaves erratically often has a floating input or a marginal timing fault. A peripheral that never responds is frequently a hung bus — a stuck line or missing pull-up — or bus contention where two devices fight over one line. A device that works until it warms up, then glitches, is a classic thermal intermittent, often a cracked solder joint. In every case the technician's edge is the same: recognize the mode, run the power-clock-reset checks, then trace the logic to the first line that isn't what it should be. Learning this transforms a digital board from an opaque brick into a solvable puzzle.
Common Challenges
- Blaming the processor first. A dead board is far more often a power, clock, or reset fault than a failed CPU. Checking the basics first saves hours of chasing the wrong part.
- Ignoring floating inputs. An unused CMOS input left undriven floats to an indeterminate state and can make a circuit behave randomly — a subtle, easily-missed cause of erratic behavior.
- Forgetting the bus is shared. When everything on a bus is silent, one stuck or contended line takes down the whole bus; suspect the shared lines before condemning every chip.
Safety Notes
Risk Level: Low. Learning the failure modes and the method is low-risk. But applying them means working on powered gear, which is not.
Professional Tips Before Starting
- Check power, clock, and reset before anything else. The great majority of dead or frozen digital boards fail on one of these three — a missing rail, a stopped clock, or a chip held in reset — so confirm all three are good before you suspect the logic.
- Think in "should this line be HIGH or LOW right now?" Digital's two states make every node checkable against an expectation; the fault is where the actual state first diverges from what it should be. This is signal tracing, digital-style.
- Match the tool to the question. A logic probe answers HIGH/LOW/pulsing fast; an oscilloscope shows signal quality and timing; a logic analyzer decodes buses and multi-bit data. Reaching for the right one turns guessing into reading.
Recognizing and Diagnosing Digital Faults
The Digital Failure Modes
Digital circuits fail in a recognizable handful of ways:
- Stuck bit (stuck-at fault). A line frozen HIGH or LOW that never changes no matter what should drive it — from a shorted output, a failed driver, or a short to the supply or ground. The signature is a node that won't respond.
- No clock or a bad clock. With no clock, synchronous logic is frozen and the system is dead (Section 6.3); an unstable or wrong-frequency clock causes erratic operation. The clock is the heartbeat, and a stopped heart is a dead system.
- Floating input. An undriven CMOS input (Sections 6.1–6.2) has no defined state and drifts to an indeterminate, noise-sensitive level, causing random or erratic behavior. CMOS inputs must be driven or tied to a level.
- Bus faults and bus contention. A hung bus from a stuck line or missing I2C pull-ups (Section 6.4), or bus contention — two outputs driving the same line at once, one HIGH and one LOW, fighting — which corrupts data and can overheat or damage the drivers. (This destructive fighting is a push-pull/tri-state behavior; open-drain buses like I2C instead wire-AND, so simultaneous access corrupts data without the overheating.)
- Corrupted data / bit errors. Wrong bits from marginal timing and metastability (Section 6.3), noise, or a bad memory cell — the system runs but the data is wrong.
- Power and reset problems. A missing, wrong-voltage, or noisy supply rail, or a brownout, stops logic from working correctly; and a chip held in reset never runs at all — a commonly-overlooked cause of a "dead" chip that is actually just being held halted.
- Total dead. No output, no life — almost always no power, no clock, or held in reset, rather than a failed processor.
The Method: Check Power, Clock, Reset — Then Trace
Digital diagnosis follows an order that catches the common causes first. Check power first: confirm every supply rail is present, at the right voltage, and reasonably clean — a huge share of digital faults are really a power problem, exactly as the analog chapters put power first. Check the clock next (Section 6.3): a synchronous system with no clock does nothing, so confirm a clean clock of the expected frequency is present and reaching the chips — but probe the buffered clock output or the oscillator's output pin, not the crystal's input pin, since an ordinary scope probe can load a crystal enough to stop it and make a good clock look dead. Check reset: many chips have a reset line that halts them while asserted, and a chip stuck in reset (a bad reset circuit, a held reset line) looks completely dead — so verify the device isn't simply being held reset. Only once power, clock, and reset are confirmed good does it make sense to suspect the logic itself. This power-clock-reset sequence resolves the majority of dead-board cases before any logic tracing begins.
Signal-Tracing the Logic and Comparing to Known-Good
When the basics are good, trace the logic the way Section 5.5 traced an analog signal — but with a decisive advantage. Because every digital line is simply HIGH or LOW, you can ask of each node: is this what it should be right now? Using the truth tables from Section 6.1, the flip-flop behavior from Section 6.2, and the expected bus traffic from Section 6.4, you know what each line ought to be, and you compare it to what it actually is. The fault is where the actual state first diverges from the expected — the first stage whose output is wrong for its inputs, the first bus cycle that doesn't match, the register that didn't load. Comparing against a known-good reference — the same point on a working identical board — makes this even faster: any difference points at the fault. This "actual versus expected, localize the first divergence" is the heart of systematic digital diagnosis.
The Right Tool for the Question
Three tools answer three different questions. A logic probe quickly tells you whether a line is HIGH, LOW, or pulsing — ideal for a fast stuck-bit or is-there-activity check. An oscilloscope shows the actual waveform — signal quality, noise, edges, and timing — needed for clock integrity and marginal-timing faults. A logic analyzer, especially one that decodes I2C/SPI/UART, captures many lines at once and shows the actual bytes and addresses on a bus — indispensable for bus and multi-bit data problems. Matching the tool to the question turns diagnosis from guesswork into reading the circuit directly.
Common Root Causes
Across digital faults, a short list of root causes dominates: power (a missing or out-of-spec rail), clock (stopped or unstable), reset (held asserted), a stuck or contended line (shorted, or two drivers fighting), a floating input, bad connections (a cracked solder joint or corroded contact, the usual source of thermal intermittents), and occasionally a genuinely failed chip or memory. Notably, a truly dead failed processor is far down this list — which is why the method checks the common, cheap-to-verify causes first.
Common Mistakes
- Suspecting the CPU before power, clock, and reset. These three explain most dead boards; check them first.
- Overlooking a floating input. An undriven CMOS input causes erratic behavior and is easy to miss; unused inputs must be tied.
- Missing bus contention. Two outputs driving one line fight and corrupt data (and can overheat); a shared line misbehaving affects the whole bus.
- Not using a known-good reference. Comparing to a working board turns "I'm not sure" into a direct, fast diagnosis.
Troubleshooting Guidance
Start every digital diagnosis with the power-clock-reset triage, because it resolves most cases fast. Power: measure each supply rail for the correct voltage and reasonable cleanliness — a missing or sagging rail (or a brownout) makes logic misbehave or die, so this comes first exactly as in the analog chapters. Clock: confirm a clean clock of the expected frequency is present and reaching the chips (Section 6.3); no clock means a dead synchronous system. Reset: verify the device is not being held in reset — a stuck reset line or bad reset circuit halts a chip so it looks failed when it is merely stopped. With those three good, signal-trace the logic: pick a suspect area, and at each node compare the actual HIGH/LOW (or bus traffic) to what it should be from the truth tables, flip-flop rules, and protocol expectations of the earlier sections, working from the inputs toward the output; the fault is the first place actual diverges from expected. Watch the specific signatures: a line stuck HIGH or LOW that never changes (stuck-at — a short or a dead driver), an erratic system that may be a floating input or marginal timing, a hung bus (missing pull-ups or a stuck line) or bus contention (two drivers fighting — often a line that sits at an odd mid-level and where drivers run hot), and an intermittent that comes and goes with temperature or flexing, classically a cracked solder joint. Use the right tool — logic probe for quick state, scope for signal quality and timing, logic analyzer for buses — and lean on a known-good board whenever one is available. Because so much digital logic depends on the shared essentials, confirm power, clock, and reset before ever condemning a chip.
Verification & Testing Methods
Check your understanding before moving on:
- [ ] Name the common digital failure modes and the symptom that identifies each.
- [ ] State the check-power, check-clock, check-reset sequence and why it comes before logic tracing.
- [ ] Explain how to signal-trace digital logic by comparing actual states to expected ones and to a known-good reference.
- [ ] Match a logic probe, oscilloscope, and logic analyzer to the kind of digital fault each best diagnoses.
Then try the practice exercises below — reasoning about digital symptoms and diagnostic method, no powered work required.
Practice Exercises
- Name the mode (5 minutes, reasoning). For each symptom, name the failure mode: (a) a data line that never changes state no matter what; (b) a board completely dead with no activity anywhere; (c) a circuit that behaves randomly, and an unused input pin is left unconnected; (d) two devices' outputs tied to one line, which sits at an odd mid-level and runs hot.
- Order the checks (5 minutes, reasoning). A digital board is completely dead. List, in order, the first three things you would verify before suspecting the logic, and explain why each can produce a totally dead board.
- Actual versus expected (10 minutes, reasoning). Explain how digital's two-state nature lets you localize a fault by comparing each line's actual state to what it should be, and what "the fault is where actual first diverges from expected" means in practice.
- Pick the tool (10 minutes, reasoning). For each task, choose a logic probe, oscilloscope, or logic analyzer and say why: (a) check quickly whether a line is pulsing; (b) capture eight parallel data lines at once to see which single bit is stuck; (c) check a clock's edge quality and whether it is jittering.
These core ideas — the digital failure modes, the power-clock-reset method, actual-versus-expected signal tracing against a known-good reference, and matching the tool to the fault — are tested in the Chapter Quiz at the end of this chapter, where a score of 80% is required to continue.
Key Takeaways
- Digital circuits fail in a recognizable set: a stuck-at fault (a bit frozen HIGH or LOW), no or bad clock, a floating input (undriven CMOS reading indeterminate), bus faults and bus contention (two drivers fighting one line), corrupted data, power and reset problems, and total-dead.
- Diagnose in order: check power (right voltage, clean), check the clock (present and correct), and check reset (not held) before suspecting the logic — these three explain most dead boards.
- Then signal-trace the logic: because every line is HIGH or LOW, compare each node's actual state to what it should be (from truth tables, flip-flop rules, and protocol expectations); the fault is where actual first diverges from expected.
- A known-good identical board is a powerful reference — any difference from it points at the fault.
- Match the tool to the question: a logic probe for HIGH/LOW/pulsing, an oscilloscope for signal quality and timing, a logic analyzer for buses and multi-bit data.
- The common root causes are power, clock, reset, a stuck or contended line, a floating input, and bad connections (cracked solder joints causing intermittents) — a truly failed processor is far down the list.
Skills Learned
- You can now recognize and name the common digital failure modes from their symptoms.
- You can now apply the check-power, check-clock, check-reset sequence before tracing logic.
- You can now signal-trace a digital circuit by comparing actual states to expected ones and to a known-good reference.
- You can now link a digital symptom to a likely root cause and pick the right diagnostic tool.
- You can now approach a digital fault as a systematic, solvable diagnosis rather than a mystery.
Glossary Additions
- stuck-at fault — a digital fault in which a line is frozen at a constant HIGH or LOW and never changes regardless of what should drive it; typical causes are a shorted output, a failed driver, or a short to the supply or ground.
- floating input — an input, especially a CMOS input, left undriven and not tied to a defined level, so it drifts to an indeterminate, noise-sensitive state and can cause random or erratic behavior; unused inputs must be tied HIGH or LOW.
- bus contention — a fault in which two or more outputs drive the same shared line at the same time with opposing levels (one HIGH, one LOW), fighting each other; it corrupts data, produces an invalid mid-level, and can overheat or damage the drivers.
- reset — a control signal or condition that forces a chip into a known initial state and holds it halted while asserted; a device stuck in reset (a bad reset circuit or a held reset line) does nothing and can appear failed when it is merely being held.
Suggested Next Sections
Must read next:
- DC Power Supply Fundamentals — the opening of Chapter 7 (Power Systems and Regulation), which turns to how electronics get clean, correct power in the first place — the supply rails whose faults you just learned to check first.
Recommended:
- Common Analog Failure Modes — the parallel analog diagnostic framework; digital diagnosis is its two-state cousin.
- Buses and Communication Protocols — I2C, SPI, UART — the bus faults and contention that are a major digital failure mode.