The Repair LibraryRead · Learn · Master

PoP — Package-on-Package Theory

The chapter's third bend stacks the assumption itself: package-on-package mounts one area array on the back of another, and everything the volume knows about hidden fields now applies twice to a single board footprint. The bottom package — almost always the application processor — carries a standard field to the board and a ring of lands on its own top face; the top package — almost always the memory — seats its balls onto those lands, forming the interface field: a joint field suspended in mid-air between two packages, born in the same reflow that made everything else and hidden better than any field the volume has met. This section is theory at Professional depth, because the stack invents failure geometry that neither package would suffer alone. Two bodies warp differently as temperature moves — the thin logic package with its big die and the memory package above it flex on different curves — and the interface joints at the perimeter absorb the disagreement, which is why head-in-pillow opens and warm-intermittent memory faults concentrate there. Diagnosis inherits a doubled superposition problem: the X-ray sees both fields overlaid in one shadow, and the electrical partition — memory bus through the interface, power and ground mostly through the board field — becomes the sharpest tool for asking which field failed. And rework inherits the melt order: heat arrives from above, so the interface field goes molten before the board field, a full-stack removal passes through a double-molten moment where the stack can shift on two layers at once, and the lighter surgery — top-only rework, lifting the memory while the processor keeps its board field — exists precisely because the order can be planned. The separation section that closes the chapter will do the mechanics; this section builds the geometry, the mismatch, and the order that make those mechanics survivable.

ProfessionalLow Risk23 min read

What You Will Learn

  • You will learn the stack's geometry — two hidden fields on one footprint, and the interface field suspended between packages.
  • You will learn the warpage mismatch — two bodies flexing on different curves, and the interface perimeter that absorbs the disagreement.
  • You will learn the doubled diagnosis problem — superimposed fields under X-ray, and the electrical partition that separates them.
  • You will learn the melt order — which field goes molten first under top heat, and the double-molten moment a full-stack flight must survive.
  • You will learn the repair envelope of a stack — top-only rework as the lighter surgery, and the decision logic between one level and both.

What You Will Be Able To Do

  • You will be able to identify a PoP stack on a real board and read its doubled seam.
  • You will be able to sketch a stack's geometry — board field, interface field, mold wells, pitch estimates.
  • You will be able to partition a fault hypothesis between board field and interface field from its signature.
  • You will be able to write a melt-order brief for a proposed rework — what melts when, and where the risk concentrates.
  • You will be able to frame the one-level-or-both decision with the volume's repairability math.

Required Tools

  • The microscope and grazing light — the stack's doubled seam is an edge read, and edge reads live at magnification
  • A donor smartphone board with its processor stack — the natural PoP habitat, one per phone
  • The notebook — this section produces a geometry sketch and a melt-order brief, both written
  • The board's service literature where it exists — memory-bus topology decides the electrical partition

When NOT to Attempt This

Do not attempt this section if any of the following apply to you:

  • You are not experienced with the specific repair type described here.
  • You do not have professional-grade equipment for this procedure.
  • The device has sentimental or high monetary value and you cannot afford a mistake.
  • You have not successfully completed this repair on a sacrificial device first.

Section Overview

The chapter's third bend: the array stacked on the array — every hidden-field law now applies twice to one footprint (bga-in-modern-consumer-electronics). The stack is two fields. The processor's standard field to the board, and the interface field — the memory's balls seated on the processor's top-face lands, a joint field suspended in mid-air (bga-failure-modes). The warpage mismatch is the stack's own failure engine. Two bodies flexing on different curves, the interface perimeter absorbing the disagreement — opens and warm intermittents concentrate where the mismatch does. Diagnosis doubles its superposition. The X-ray sees both fields in one shadow; the electrical partition — memory bus through the interface, power mostly through the board — separates what the image cannot (x-ray-inspection-of-bga). And the melt order frames every rework. Top heat melts the interface first, the board field last — top-only surgery exists because the order can be planned, and the full-stack flight must survive its double-molten moment (thermal-profile-design-for-bga-reflow). Two fields, one mismatch, a doubled shadow, a planned order — the stack entire.

Why This Matters

The PoP stack sits at the center of nearly every phone — and many tablets — the bench will meet: the processor and its memory, one footprint, two fields (bga-in-modern-consumer-electronics). This matters because the stack answers as one component until it doesn't: most instruments, most quotes, and most first guesses treat the stack as a single BGA — and every discipline built on that guess inherits a hidden second field it never planned for (bga-failure-modes). This matters because the interface is the stack's weak seam: warpage mismatch concentrates its damage at the mid-air joints, which is why memory-bus intermittents that appear warm point up into the stack before they point down at the board (x-ray-inspection-of-bga). It matters because diagnosis pays the superposition tax twice: two fields overlay in every top-down image, and the bench that cannot partition electrically will stare at a doubled shadow and call it confusing instead of calling it two questions. It matters because the melt order decides what surgery is possible: top-only rework — the memory lifted, the processor undisturbed — is the lighter operation and the better economics, and it exists only for the bench that plans which field melts when (thermal-profile-design-for-bga-reflow). And it matters because the separation section builds on this one: the chapter closes with the mechanics of taking a stack apart, and every one of those mechanics leans on the geometry, the mismatch, and the order taught here. Know the stack before heating the stack — the theory is the safety margin.

Required Prerequisites

Before starting this section, you should have completed:

  • BGA in Modern Consumer Electronics — where the stack first appeared: the package-on-package construction and the doubled-seam edge tell this section builds into full geometry.
  • BGA Failure Modes — the failure vocabulary the stack doubles: mechanical strain, process faults, and the head-in-pillow open that the interface field makes its signature.
  • Isopropyl alcohol and lint-free wipes — donor boards clean before study; the doubled seam reads through grime badly.
  • A fine wooden pick — for gentle edge exploration of the stack's two seams under magnification, never for prying.
  • Graph paper or a sketching app — the geometry sketch is this section's product, and the stack rewards drawing to scale.
  • A donor smartphone board — most modern ones carry a PoP stack at their center, and the ones that do not make honest census negatives; the processor's neighborhood is the study site.
  • A donor tablet board for contrast — some carry PoP, some discrete memory beside the processor; telling the two apart is the census skill.
  • A sacrificial pre-separated stack, if available — a top package already lifted from its bottom shows the interface lands and mold wells directly.

Real-World Applications

The stack's theory is what separates benches that fix phone logic faults from benches that make them worse. A technician triaging a phone that reboots when warm runs the partition this section teaches: memory-bus symptoms, warm onset, no drop history — the hypothesis points at the interface field's mismatch fatigue before anyone heats anything (bga-failure-modes). A board-level shop quoting processor-area work reads the doubled seam first: PoP confirmed, the quote splits into top-only and full-stack branches with different prices, and the customer hears the difference explained instead of averaged (bga-in-modern-consumer-electronics). A bench planning its first stack rework writes the melt-order brief before the station warms — which field reaches liquidus when, where the double-molten moment sits, and what the abort looks like at each stage (thermal-profile-design-for-bga-reflow). And a diagnostician reading a stack X-ray expects the doubled shadow instead of being defeated by it — two fields overlaid, oblique views to separate them, and the electrical partition carrying what the image cannot (x-ray-inspection-of-bga). The confusions this prevents: a stack quoted as a single BGA, a warm intermittent chased into the board while the interface holds the fault, an X-ray called clean because nobody knew it showed two fields, and a full-stack removal improvised where a top-only lift was the whole job.

Common Challenges

  • The stack hides in plain sight. From above, a PoP is one package — the tell is the edge: two seams stacked, the doubled line the consumer-electronics section taught, read under grazing light (bga-in-modern-consumer-electronics).
  • The mid-air ring cannot be seen at all. It is suspended between two packages — no edge peek reaches a mid-air perimeter — its evidence is electrical signatures, X-ray with oblique views, and the theory that predicts where it fails (x-ray-inspection-of-bga).
  • Fault signatures overlap. A dead memory bus can be an interface open, a board-field open, or the die itself — the partition narrows by signature — warm onset favors mismatch, drop history favors the board field's corners — but it convicts nothing without instruments (bga-failure-modes).
  • The order is invisible until it is too late. Both fields answer to the same heat from above, on a delay — the bench that has not planned the melt order discovers it mid-flight, with the stack floating on two molten layers (thermal-profile-design-for-bga-reflow).

Safety Notes

Risk Level: Low. This section heats nothing and separates nothing — its discipline is geometry, and the law still stands around it.

  • ESD discipline throughout — the stack is the board's most expensive silicon, twice over.
  • No prying at either seam — the doubled seam is read, not tested; separation mechanics belong to the next section's tooling.
  • Handle donors as if live — the habits built here run the real stacks later.

Professional Tips Before Starting

  • Find the stack by its neighborhood first. The processor sits near its power delivery — dense small inductors and the board's thickest copper — the neighborhood locates the stack faster than the marking, which usually belongs to the memory on top (bga-in-modern-consumer-electronics).
  • Read the top marking for what it is. The visible laser marking on a PoP is the memory vendor's, not the processor's — the processor's identity hides under the stack, and service literature or the board's own model resolve it.
  • Sketch to scale. The interface ring is usually a perimeter row or two at relaxed pitch; the board field is the full dense grid — a sketch that captures the difference has already learned half the section (x-ray-inspection-of-bga).
  • Write the partition before the instruments arrive. Signature first, hypothesis second, instrument third — the bench that X-rays before partitioning reads a doubled shadow with no question in mind (bga-failure-modes).
  • Treat the melt sequence as a design input. It is not trivia — it is the difference between a top-only lift and an accidental full-stack float (thermal-profile-design-for-bga-reflow).

The Stack — Two Fields, One Mismatch, a Planned Order

Recap and Frame

The volume arrives fluent in single hidden fields: their physics, their failures, their instruments, their rework (bga-failure-modes). The consumer chapter introduced the stack. Package-on-package named, the doubled-seam tell taught, and the promise made that the stack would get its theory — this is that section (bga-in-modern-consumer-electronics). The instrument chapters arrive ready to be doubled. X-ray superposition, electrical partition through the fanout, profile design with its staged targets — each returns here with a second field to serve (x-ray-inspection-of-bga). And the frame is honest about scope. This section is geometry, mismatch, and order — the separation mechanics, the paste-and-flux specifics, and the rebuild sequence belong to the chapter's closer, and they will assume this section cold (thermal-profile-design-for-bga-reflow). Fluency, introduction, instruments, scope — the frame set.

The Geometry — Two Fields on One Footprint

A PoP stack is two packages and two joint fields sharing a single board footprint (bga-in-modern-consumer-electronics). The bottom package is the logic. The application processor: a standard board-side field underneath — full grid, fine pitch, everything the BGA chapters taught — and on its top face, a ring of plated lands waiting for the package above. The top package is the memory. Its balls seat onto the bottom's top-face lands, forming the interface field — a joint field suspended in mid-air between two packages, made in the same factory reflow as everything else. The interface ring runs the perimeter. Usually one or two rows at relaxed pitch — coarser than the board field below, in part because the memory bus needs fewer connections than the processor's full grid — and on modern stacks the balls often seat into wells laser-drilled through the bottom package's overmold (x-ray-inspection-of-bga). The stack answers as one component. One footprint on the board, one shadow to most instruments, one line on most quotes — and two fields in every fact that matters to repair (bga-failure-modes). Logic below, memory above, a ring between, wells through the mold — the geometry entire. Every law the volume taught applies to both fields; the craft is remembering there are two.

The Mismatch — Warpage and the Interface's Burden

Stacking invents a failure engine neither package suffers alone: two bodies warping on different curves (bga-failure-modes). Warpage is temperature's geometry. Every laminate package flexes as it heats and cools — the thin logic package with its large stiff die curves one way, the memory package with its own construction curves another — and the curves disagree more as temperature moves. The interface absorbs the disagreement. The mid-air perimeter joints are the only thing holding the two curves together: manufacture-time mismatch births head-in-pillow opens at the ring's corners, service-life mismatch fatigues them, and rework heat re-runs the whole disagreement on joints that were already the stack's most stressed (thermal-profile-design-for-bga-reflow). The signature follows the mechanism. Interface faults live on the memory bus and lean thermal: the reboot that arrives warm, the memory error that clears cold — mismatch faults breathe with temperature, because temperature is what drives the curves apart (bga-in-modern-consumer-electronics). The partition is the diagnostic answer. The X-ray shows both fields overlaid — the superposition problem doubled, oblique views earning their keep — while the electrical partition separates what the image cannot: the memory bus crosses the interface, power and ground feed mostly through the board field — though the memory's own power crosses the interface too, so an interface fault can present as memory power loss, not only bus errors — and a signature sorted against that map points at one field before any instrument fires (x-ray-inspection-of-bga). Curves, burden, signature, partition — the mismatch entire. The interface field fails first not because it is weakest but because it is where the stack's disagreement is stored.

The Order — Melt Sequence and the Repair Envelope

Rework heat arrives from above, and the stack melts in order: interface first, board field last (thermal-profile-design-for-bga-reflow). The order is physics, not choice. The interface ring sits closer to the heat and behind less mass; the board field hides under the whole stack's thermal bulk — the gap between their liquidus moments is the window every stack surgery lives in. Top-only rework is the lighter surgery. Lift the memory while the board field stays solid: the memory-fault stack keeps its processor seated, the board field is never re-run, and the operation risks one field instead of two — the better economics whenever the fault partition points up (bga-failure-modes). The full-stack removal passes through the double-molten moment. Both fields liquid at once, the stack floating on two layers that can each shift — the highest-risk seconds in the volume's rework, survivable because they are planned: entered deliberately, held briefly, exited with the lift (bga-in-modern-consumer-electronics). The melt-order brief is the plan made written. Which field reaches liquidus when, where the window sits, what top-only would look like, what the abort is at each stage — the page the separation section will demand before any stack sees heat (thermal-profile-design-for-bga-reflow). And the envelope math frames it all. One level or both, the repairability chapter's discipline applied to a stack: fault partition, heat lifetimes — two packages spending them now — and the honest quote that prices the actual surgery. Physics, surgery, moment, brief, math — the order entire. The stack rewards the bench that plans in fields, and punishes the one that heats in packages.

Common Mistakes

  • Treating the stack as one BGA. One footprint, one shadow, one quote line — and two fields in every fact that matters: the plan built on one field inherits the second at the worst possible time (bga-in-modern-consumer-electronics).
  • Chasing warm intermittents into the board first. The board field is familiar, so it gets blamed — but mismatch faults breathe with temperature and live at the interface; the partition runs before the blame does (bga-failure-modes).
  • Calling a doubled X-ray clean. Two overlaid fields hide each other's faults — a stack image reads with the geometry sketch beside it and oblique views separating the rings (x-ray-inspection-of-bga).
  • Improvising the melt sequence at temperature. The order is physics and can be planned cold — discovering mid-flight that both fields are molten is how stacks shift on two layers at once (thermal-profile-design-for-bga-reflow).
  • Defaulting to full-stack removal. The dramatic surgery feels thorough — but top-only rework risks one field instead of two, and the envelope math usually prefers it when the fault points up.

Troubleshooting Guidance

  • Cannot confirm PoP vs discrete memory — the edge decides: a doubled seam under grazing light is the stack; a single seam with memory chips beside the processor is discrete — and where the edge is shielded, the service literature or board photos resolve it (bga-in-modern-consumer-electronics).
  • Fault signature fits both fields — partition by what moves it: warm onset and memory-bus specificity lean interface; drop history, flex history, and power-rail involvement lean board field — and a signature that truly straddles stays two hypotheses with two instrument plans (bga-failure-modes).
  • Stack X-ray unreadable — the geometry sketch is the decoder: mark the interface ring's expected position from the sketch, then oblique views to walk the rings apart; a top-down-only read of a stack is one exposure short of an answer (x-ray-inspection-of-bga).
  • Melt-order brief feels unwritable for an unfamiliar stack — start from the two constants: interface melts first under top heat, board field last under top-biased heating — noting that a bottom-preheat-dominant station compresses or can invert the order, which is why the brief is written for the station actually in use — then fill the specifics from the package classes and the profile section's staging discipline; a brief with honest unknowns beats a flight with silent ones (thermal-profile-design-for-bga-reflow).

Verification & Testing Methods

Confirm your stack fluency before calling this section complete:

  • [ ] I can identify a PoP stack by its doubled seam and neighborhood, and name which package the visible marking belongs to.
  • [ ] I can sketch the stack's geometry — board field, interface field, mold wells, relative pitches — to usable scale.
  • [ ] I can explain the warpage mismatch — two curves, the interface's burden, and why its faults breathe with temperature.
  • [ ] I can partition a fault between fields from its signature, and name the instrument that would convict each hypothesis.
  • [ ] I can write a melt order brief — what melts when, where the double-molten moment sits, what top-only surgery would look like — and frame the one-level-or-both call with per-field envelope math.

Then try the practice exercises below — observation and desk work only; scenarios differ from the quiz.

Practice Exercises

  1. Run the stack census (5 minutes, donor boards under grazing light). Survey each donor's processor neighborhood: doubled seam or single, PoP or discrete memory beside the logic — with the evidence for each call written, and the visible marking attributed to the correct package (bga-in-modern-consumer-electronics).
  2. Sketch the geometry (5 minutes, the confirmed stack). Draw the two fields to usable scale: the board field's full grid, the interface ring's perimeter rows and relaxed pitch, mold wells if the edge suggests them — the sketch that will decode every future instrument read on this stack (x-ray-inspection-of-bga).
  3. Drill the partition (5 minutes, desk work). For three signatures — a reboot that arrives warm, a dead board after a drop, a memory error present cold and warm — write the field hypothesis, the mechanism, and the instrument that would convict it (bga-failure-modes).
  4. Write the melt-order brief (5 minutes, the sketched stack). For a hypothetical memory-fault repair: which field melts first and why, where the double-molten moment sits, what the top-only surgery looks like, and the one-level-or-both call with its envelope reasoning (thermal-profile-design-for-bga-reflow).

These core steps — the census, the geometry sketch, the fault partition, and the melt-order brief — are tested in the Chapter Quiz at the end of this chapter, where a score of 80% is required to continue.

Key Takeaways

  • A PoP stack is two hidden fields on one footprint — the processor's board field below, the interface field suspended in mid-air above, a perimeter ring at relaxed pitch that most instruments and most first guesses miss (bga-in-modern-consumer-electronics).
  • The warpage mismatch is the stack's own failure engine — two bodies on different curves, the interface absorbing the disagreement, and faults that breathe with temperature because temperature drives the curves (bga-failure-modes).
  • Diagnosis pays superposition twice — both fields overlay in every top-down image, and the electrical partition separates what the X-ray cannot (x-ray-inspection-of-bga).
  • The melt order frames every stack rework — interface first under top heat, board field last, top-only surgery in the gap, and the double-molten moment planned or suffered (thermal-profile-design-for-bga-reflow).
  • The envelope math runs per field — one level or both, two heat lifetimes spending at once, and the honest quote priced on the actual surgery.

Skills Learned

After completing this section, you can:

  • Identify PoP stacks by seam, neighborhood, and marking attribution.
  • Sketch a stack's two-field geometry to a scale that decodes its instrument reads.
  • Partition fault hypotheses between board field and interface field by signature.
  • Write a melt-order brief with the double-molten moment and top-only option mapped.
  • Frame stack repair decisions with per-field envelope math.

Glossary Additions

New terms introduced in this section:

  • interface field — the joint field suspended between a PoP stack's two packages: the top package's balls seated onto the bottom package's top-face lands, usually a perimeter ring of one or two rows at relaxed pitch, often seated into wells laser-drilled through the bottom's overmold. Born in the same factory reflow as every other field and hidden better than any — no edge peek reaches a mid-air perimeter — it is read through electrical signatures, oblique X-ray views, and the geometry sketch that predicts where it runs. The interface is the stack's most stressed field, because it is where the warpage mismatch stores its disagreement.
  • warpage mismatch — the failure engine stacking invents: two stacked bodies flex on different curves as temperature moves — the thin logic package with its large stiff die on one curve, the memory package above on another — and the interface joints at the perimeter are the only thing holding the curves together. Manufacture-time mismatch births head-in-pillow opens at the ring's corners; service-life mismatch fatigues them; rework heat re-runs the disagreement on the stack's most stressed joints. Its signature breathes with temperature — the reboot that arrives warm, the memory error that clears cold — because temperature is what drives the curves apart.
  • melt order — the sequence in which a stack's fields reach liquidus under rework heat: the interface ring first — closer to the top heat, behind less mass — and the board field last, buried under the stack's thermal bulk. The order is physics and is planned cold: the gap between the two liquidus moments is the window where top-only rework lives, and the full-stack removal's double-molten moment — both fields liquid, the stack afloat on two layers — is entered deliberately, held briefly, and exited with the lift. The melt-order brief writes it down: what melts when, where the risk sits, and what the abort looks like at each stage.

Suggested Next Sections

Must read next:

  • PoP Separation and Rework — Section 6.4 closes the chapter with the mechanics this theory makes survivable: taking a stack apart one level at a time, and rebuilding it in the order the geometry demands.

Recommended: